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DATE
2003
IEEE
96views Hardware» more  DATE 2003»
16 years 1 days ago
Test Data Compression: The System Integrator's Perspective
Test data compression (TDC) is a promising low-cost methodology for System-on-a-Chip (SOC) test. This is due to the fact that it can reduce not only the volume of test data but al...
Paul Theo Gonciari, Bashir M. Al-Hashimi, Nicola N...
ITC
2003
IEEE
145views Hardware» more  ITC 2003»
16 years 22 hour ago
MEMS Manufacturing Testing: An Accelerometer Case Study
Electrical testing of MicroElectroMechanical Systems (MEMS) can take on many different forms including wafer probing, electrical trimming, final test at temperatures, engineering ...
Theresa Maudie, Alex Hardt, Rick Nielsen, Dennis S...
ITC
2003
IEEE
146views Hardware» more  ITC 2003»
16 years 22 hour ago
A New Approach for Low Power Scan Testing
As semiconductor manufacturing technology advances, power dissipation and noise in scan testing has become a critical problem. In our studies on practical LSI manufacturing, we ha...
Takaki Yoshida, Masafumi Watari
151
Voted
EUROCRYPT
2003
Springer
15 years 12 months ago
Nearly One-Sided Tests and the Goldreich-Levin Predicate
Abstract. We study statistical tests with binary output that rarely outputs one, which we call nearly one-sided statistical tests. We provide an efficient reduction establishing im...
Gustav Hast
DFT
2002
IEEE
121views VLSI» more  DFT 2002»
15 years 11 months ago
Testing Digital Circuits with Constraints
Many digital circuits have constraints on the logic values a set of signal lines can have. In this paper, we present two new techniques for detecting the illegal combinations of l...
Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McC...