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DFT
1999
IEEE
119views VLSI» more  DFT 1999»
15 years 11 months ago
RAMSES: A Fast Memory Fault Simulator
In this paper, we present a memory fault simulator called the Random Access Memory Simulator for Error Screening (RAMSES). Although it was designed based on some wellknown memory ...
Chi-Feng Wu, Chih-Tsun Huang, Cheng-Wen Wu
STOC
1998
ACM
135views Algorithms» more  STOC 1998»
15 years 11 months ago
Checking Polynomial Identities over any Field: Towards a Derandomization?
We present a Monte Carlo algorithm for testing multivariate polynomial identities over any field using fewer random bits than other methods. To test if a polynomial P(x1 ::: xn) ...
Daniel Lewin, Salil P. Vadhan
ITC
1996
IEEE
127views Hardware» more  ITC 1996»
15 years 11 months ago
Altering a Pseudo-Random Bit Sequence for Scan-Based BIST
This paper presents a low-overhead scheme for built-in self-test of circuits with scan. Complete (100%) fault coverage is obtained without modifying the function logic and without...
Nur A. Touba, Edward J. McCluskey
CAISE
2006
Springer
15 years 10 months ago
A Method for Functional Alignment Verification in Hierarchical Enterprise Models
Enterprise modeling involves multiple domains of expertise: requirements engineering, business process modeling, IT development etc. Our experience has shown that hierarchical ente...
Irina Rychkova, Alain Wegmann
APLAS
2003
ACM
15 years 10 months ago
Resource Usage Verification
We investigate how to automatically verify that resources such as files are not used improperly or unsafely by a program. We employ a mixture of compile-time analysis and run-time ...
Kim Marriott, Peter J. Stuckey, Martin Sulzmann