6704 search results - page 139 / 1341 » Testing Scenario-Based Models |
191
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EVOW
2001
Springer
15 years 11 months ago
2001
Springer
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
165
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NPAR
2006
ACM
16 years 11 days ago
2006
ACM
We present techniques to create convincing high-quality watercolor illustrations of plants. Mainly focusing on the real-time rendering, we introduce methods to abstract the visual...
177
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BMCBI
2007
15 years 6 months ago
2007
Background: Boolean network (BN) modeling is a commonly used method for constructing gene regulatory networks from time series microarray data. However, its major drawback is that...
207
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ECCC
2007
15 years 6 months ago
2007
We study graph properties which are testable for bounded degree graphs in time independent of the input size. Our goal is to distinguish between graphs having a predetermined grap...
176
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ET
2002
15 years 6 months ago
2002
LVDS is the acronym for Low-Voltage-DifferentialSignaling and is described in both the ANSI/TIA/EIA644 and IEEE 1596.3 standards. High performance yet Low Power and EMI have made ...