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VTS
2003
IEEE
95views Hardware» more  VTS 2003»
16 years 15 days ago
Built-In Reseeding for Serial Bist
Reseeding is used to improve fault coverage in pseudo-random testing. Most of the work done on reseeding is based on storing the seeds in an external tester. Besides its high cost...
Ahmad A. Al-Yamani, Edward J. McCluskey
DATE
2000
IEEE
130views Hardware» more  DATE 2000»
15 years 11 months ago
Optimal Hardware Pattern Generation for Functional BIST
∗∗ Functional BIST is a promising solution for self-testing complex digital systems at reduced costs in terms of area and performance degradation. The present paper addresses t...
Silvia Cataldo, Silvia Chiusano, Paolo Prinetto, H...
ET
2010
122views more  ET 2010»
15 years 4 months ago
Fault Models for Quantum Mechanical Switching Networks
This work justifies several quantum gate level fault models and discusses the causal error mechanisms thwarting correct function. A quantum adaptation of the classical test set gen...
Jacob D. Biamonte, Jeff S. Allen, Marek A. Perkows...
211
Voted
CIDR
2009
167views Algorithms» more  CIDR 2009»
15 years 8 months ago
Unbundling Transaction Services in the Cloud
The traditional architecture for a DBMS engine has the recovery, concurrency control and access method code tightly bound together in a storage engine for records. We propose a di...
David B. Lomet, Alan Fekete, Gerhard Weikum, Micha...
186
Voted
ASPLOS
2012
ACM
14 years 3 months ago
Clearing the clouds: a study of emerging scale-out workloads on modern hardware
Emerging scale-out workloads require extensive amounts of computational resources. However, data centers using modern server hardware face physical constraints in space and power,...
Michael Ferdman, Almutaz Adileh, Yusuf Onur Ko&cce...