This work presents a cost-effective test structure that is applicable to built-in self-test of time-to-digital converters (TDCs). The proposed structure uses deterministic dynamic ...
Wenbo Liu, Hanqing Xing, Le Jin, Randall L. Geiger...
High defect coverage requires good coverage of different fault types. In this paper, we present a comprehensive test vector generation technique for BIST, called Random Single Inp...
The embedded core testing methodology at Advanced Micro Devices Inc. involves adopting a disciplined system for developing new products with a focus on time to market and engineer...
In this paper, we propose two fault models and methods for the derivation of interoperability test suites when the system implementation is given in the form of two deterministic c...
We present our experience in automatically deriving a detailed test case plan exclusively using the UML diagrams developed during the analysis and design phases. We consider in pa...