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VLSID
2002
IEEE
131views VLSI» more  VLSID 2002»
16 years 6 months ago
Divide-and-Conquer IDDQ Testing for Core-Based System Chips
IDDQ testing has been used as a test technique to supplement voltage testing of CMOS chips. The idea behind IDDQ testing is to declare a chip as faulty if the steady-state current...
C. P. Ravikumar, Rahul Kumar
SBCCI
2004
ACM
117views VLSI» more  SBCCI 2004»
15 years 11 months ago
Reducing test time with processor reuse in network-on-chip based systems
This paper proposes a test planning method capable of reusing available processors as test sources and sinks, and the on-chip network as the access mechanism for the test of cores...
Alexandre M. Amory, Érika F. Cota, Marcelo ...
FMCO
2008
Springer
117views Formal Methods» more  FMCO 2008»
15 years 7 months ago
Conformance Testing of Distributed Concurrent Systems with Executable Designs
Abstract. This paper presents a unified approach to test case generation and conformance test execution in a distributed setting. A model in the object-oriented, concurrent modelin...
Bernhard K. Aichernig, Andreas Griesmayer, Einar B...
DATE
2007
IEEE
76views Hardware» more  DATE 2007»
16 years 20 days ago
Heterogeneous systems on chip and systems in package
This paper discusses several forms of heterogeneity in systems on chip and systems in package. A means to distinguish the various forms of heterogeneity is given, with an estimati...
I. O'Connor, B. Courtois, K. Chakrabarty, N. Delor...
CORR
2010
Springer
86views Education» more  CORR 2010»
15 years 3 months ago
Time-Symmetric Cellular Automata
Together with the concept of reversibility, another relevant physical notion is time-symmetry, which expresses that there is no way of distinguishing between backward and forward t...
Andrés Moreira, Anahí Gajardo