1610 search results - page 26 / 322 » Testing Patterns |
139
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VTS
1999
IEEE
15 years 10 months ago
1999
IEEE
High-level test pattern generation is today a widely investigated research topic. The present paper proposes a fully automated, simulation-based ATPG system, to address test patte...
183
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ICCAD
2003
IEEE
15 years 11 months ago
2003
IEEE
Domino circuits have been used in most modern high-performance microprocessor designs because of their high speed, low transistor-count and hazard-free operation. However, with te...
152
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VTS
2000
IEEE
15 years 10 months ago
2000
IEEE
We propose a novel BIST technique for non-scan sequential circuits which does not modify the circuit under test. It uses a learning algorithm to build a hardware test sequence gen...
211
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ITC
1997
IEEE
15 years 10 months ago
1997
IEEE
This paper presents a new approach for designing test sequences to be generated on–chip. The proposed technique is based on machine learning, and provides a way to generate effi...