Reduction of both the test suite size and the download time of test vectors is important in today's System-On-a-Chip designs. In this paper, a method for compressing the scan...
Michael J. Knieser, Francis G. Wolff, Christos A. ...
In this paper, we explore the set of testable properties within the Safety-Progress classification where testability means to establish by testing that a relation, between the tes...
This paper provides an evaluation of SGI® RASC™ RC100 technology from a computational science software developer’s perspective. A brute force implementation of a two-point an...
Volodymyr V. Kindratenko, Robert J. Brunner, Adam ...
The paper reports on an analysis technology based on the tracing approach to test trustworthy requirements of a distributed system. The system under test is instrumented such that...
Andreas Ulrich, Hesham Hallal, Alexandre Petrenko,...
A dynamic time delay model for load balancing was proposed in distributed heterogeneous system by Hayat. But how to compute the load-transfer delay and the gain coefficient were n...