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ISQED
2006
IEEE
107views Hardware» more  ISQED 2006»
16 years 18 days ago
On Optimizing Scan Testing Power and Routing Cost in Scan Chain Design
— With advanced VLSI manufacturing technology in deep submicron (DSM) regime, we can integrate entire electronic systems on a single chip (SoC). Due to the complexity in SoC desi...
Li-Chung Hsu, Hung-Ming Chen
VTS
2005
IEEE
151views Hardware» more  VTS 2005»
16 years 4 days ago
A CMOS RF RMS Detector for Built-in Testing of Wireless Transceivers
: This project involves the design of a CMOS RF RMS Detector that converts the RMS voltage amplitude of an RF signal to a DC voltage. Its high input impedance and small area make i...
Alberto Valdes-Garcia, Radhika Venkatasubramanian,...
CCS
2003
ACM
15 years 11 months ago
Using graphic turing tests to counter automated DDoS attacks against web servers
We present WebSOS, a novel overlay-based architecture that provides guaranteed access to a web server that is targeted by a denial of service (DoS) attack. Our approach exploits t...
William G. Morein, Angelos Stavrou, Debra L. Cook,...
AAAI
2010
15 years 6 months ago
Computing Cost-Optimal Definitely Discriminating Tests
The goal of testing is to discriminate between multiple hypotheses about a system--for example, different fault diagnoses--by applying input patterns and verifying or falsifying t...
Anika Schumann, Jinbo Huang, Martin Sachenbacher
BMCBI
2011
15 years 1 months ago
Appearance frequency modulated gene set enrichment testing
Background: Gene set enrichment testing has helped bridge the gap from an individual gene to a systems biology interpretation of microarray data. Although gene sets are defined a ...
Jun Ma, Maureen A. Sartor, H. V. Jagadish