Sciweavers

693 search results - page 76 / 139
» Test of Future System-on-Chips
Sort
View
DAC
2009
ACM
16 years 7 months ago
O-Router:an optical routing framework for low power on-chip silicon nano-photonic integration
In this work, we present a new optical routing framework, O-Router for future low-power on-chip optical interconnect integration utilizing silicon compatible nano-photonic devices...
Duo Ding, Yilin Zhang, Haiyu Huang, Ray T. Chen, D...
DAC
2009
ACM
16 years 7 months ago
Decoding nanowire arrays fabricated with the multi-spacer patterning technique
Silicon nanowires are a promising solution to address the increasing challenges of fabrication and design at the future nodes of the Complementary Metal-Oxide-Semiconductor (CMOS)...
M. Haykel Ben Jamaa, Yusuf Leblebici, Giovanni De ...
DAC
1999
ACM
16 years 7 months ago
CAD Directions for High Performance Asynchronous Circuits
This paper describes a novel methodology for high performance asynchronous design based on timed circuits and on CAD support for their synthesis using Relative Timing. This method...
Ken S. Stevens, Shai Rotem, Steven M. Burns, Jordi...
ICML
2000
IEEE
16 years 7 months ago
FeatureBoost: A Meta-Learning Algorithm that Improves Model Robustness
Most machine learning algorithms are lazy: they extract from the training set the minimum information needed to predict its labels. Unfortunately, this often leads to models that ...
Joseph O'Sullivan, John Langford, Rich Caruana, Av...
POPL
2009
ACM
16 years 7 months ago
The semantics of x86-CC multiprocessor machine code
Multiprocessors are now dominant, but real multiprocessors do not provide the sequentially consistent memory that is assumed by most work on semantics and verification. Instead, t...
Susmit Sarkar, Peter Sewell, Francesco Zappa Narde...