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ASPDAC
2004
ACM
158views Hardware» more  ASPDAC 2004»
15 years 10 months ago
Decode filter cache for energy efficient instruction cache hierarchy in super scalar architectures
Abstract-- The power consumption of microprocessors has been increasing in step with the complexity of each progressive generation. In general purpose processors, this is primarily...
Kugan Vivekanandarajah, Thambipillai Srikanthan, S...
DATE
2004
IEEE
158views Hardware» more  DATE 2004»
15 years 10 months ago
Bandwidth-Constrained Mapping of Cores onto NoC Architectures
We address the design of complex monolithic systems, where processing cores generate and consume a varying and large amount of data, thus bringing the communication links to the e...
Srinivasan Murali, Giovanni De Micheli
COMPLIFE
2006
Springer
15 years 10 months ago
A Point-Matching Based Algorithm for 3D Surface Alignment of Drug-Sized Molecules
Abstract. Molecular shapes play an important role in molecular interactions, e.g., between a protein and a ligand. The `outer' shape of a molecule can be approximated by its s...
Daniel Baum, Hans-Christian Hege
ESTIMEDIA
2006
Springer
15 years 10 months ago
Loop Nest Splitting for WCET-Optimization and Predictability Improvement
This paper presents the influence of the loop nest splitting source code optimization on the worst-case execution time (WCET). Loop nest splitting minimizes the number of executed...
Heiko Falk, Martin Schwarzer
ESTIMEDIA
2006
Springer
15 years 10 months ago
Neighbors-on-Path: A New Selection Strategy for On-Chip Networks
Efficient and deadlock-free routing is critical to the performance of networks-on-chip. In this paper we present an approach that can be coupled to any adaptive routing algorithm ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...