Sciweavers

5855 search results - page 413 / 1171
» Test generation and minimization with
Sort
View
DATE
2008
IEEE
66views Hardware» more  DATE 2008»
16 years 1 months ago
Wrapper and TAM Co-Optimization for Reuse of SoC Functional Interconnects
This paper presents a wrapper and TAM co-optimization method for reuse of SoC functional interconnects to minimize test time under area constraint. The proposed method consists of...
Tomokazu Yoneda, Hideo Fujiwara
TR
2008
88views more  TR 2008»
15 years 6 months ago
Reliability Sampling Plans Under Progressive Type-I Interval Censoring Using Cost Functions
Abstract--This paper gives a reliability sampling plan for progressively type I interval censored life tests when the lifetime follows the exponential distribution. We use the maxi...
Syuan-Rong Huang, Shuo-Jye Wu
ASPDAC
2004
ACM
102views Hardware» more  ASPDAC 2004»
16 years 10 days ago
TranGen: a SAT-based ATPG for path-oriented transition faults
— This paper presents a SAT-based ATPG tool targeting on a path-oriented transition fault model. Under this fault model, a transition fault is detected through the longest sensit...
Kai Yang, Kwang-Ting Cheng, Li-C. Wang
SAMT
2007
Springer
118views Multimedia» more  SAMT 2007»
16 years 1 months ago
Annotation of Heterogeneous Multimedia Content Using Automatic Speech Recognition
This paper reports on the setup and evaluation of robust speech recognition system parts, geared towards transcript generation for heterogeneous, real-life media collections. The s...
Marijn Huijbregts, Roeland Ordelman, Franciska de ...
DATE
1997
IEEE
75views Hardware» more  DATE 1997»
15 years 11 months ago
Random benchmark circuits with controlled attributes
Two major improvements, controlled fan-in and automated initial-circuit production, were made over the random generator of benchmark circuits presented at DAC'94. This is an ...
Kazuo Iwama, Kensuke Hino, Hiroyuki Kurokawa, Suna...