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211
Voted
ATS
2005
IEEE
16 years 14 days ago
2005
IEEE
Abstract—This paper presents a low transition test pattern generator, called LT-LFSR, to reduce average and peak power of a circuit during test by reducing the transitions within...
167
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RTS
2008
15 years 6 months ago
2008
Abstract The multiprocessor scheduling of collections of real-time jobs is considered. Sufficient tests are derived for feasibility analysis of a collection of sporadic jobs where ...
165
Voted
DAC
2000
ACM
16 years 7 months ago
2000
ACM
At-speed testing of GHz processors using external testers may not be technically and economically feasible. Hence, there is an emerging need for low-cost, high-quality self-test m...
214
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DAC
2003
ACM
16 years 3 days ago
2003
ACM
We present a novel method to efficiently generate, compress and apply test patterns in a logic BIST architecture. Patterns are generated by a modified automatic test pattern gener...
163
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COR
2007
15 years 6 months ago
2007
Minimizing Waiting Time Variance (WTV) is a job scheduling problem where we schedule a batch of n jobs, for servicing on a single resource, in such a way that the variance of thei...