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DATE
2004
IEEE
120views Hardware» more  DATE 2004»
15 years 10 months ago
Pattern Selection for Testing of Deep Sub-Micron Timing Defects
Due to process variations in deep sub-micron (DSM) technologies, the effects of timing defects are difficult to capture. This paper presents a novel coverage metric for estimating...
Mango Chia-Tso Chao, Li-C. Wang, Kwang-Ting Cheng
VTS
2000
IEEE
113views Hardware» more  VTS 2000»
15 years 11 months ago
Hidden Markov and Independence Models with Patterns for Sequential BIST
We propose a novel BIST technique for non-scan sequential circuits which does not modify the circuit under test. It uses a learning algorithm to build a hardware test sequence gen...
Laurent Bréhélin, Olivier Gascuel, G...
PTS
2003
136views Hardware» more  PTS 2003»
15 years 8 months ago
The UML 2.0 Testing Profile and Its Relation to TTCN-3
UML models focus primarily on the definition of system structure and behaviour, but provide only limited means for describing test objectives and test procedures. However, with the...
Ina Schieferdecker, Zhen Ru Dai, Jens Grabowski, A...
GECCO
2008
Springer
172views Optimization» more  GECCO 2008»
15 years 7 months ago
Empirical analysis of a genetic algorithm-based stress test technique
Evolutionary testing denotes the use of evolutionary algorithms, e.g., Genetic Algorithms (GAs), to support various test automation tasks. Since evolutionary algorithms are heuris...
Vahid Garousi
CEC
2010
IEEE
15 years 3 months ago
Improving evolutionary testing by means of efficiency enhancement techniques
TestFul is a novel evolutionary testing approach for object-oriented programs with complex internal states. In our preliminary experiments, it already outperformed some of the well...
Matteo Miraz, Pier Luca Lanzi, Luciano Baresi