5855 search results - page 257 / 1171 » Test generation and minimization with |
151
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ET
2000
15 years 6 months ago
2000
: We present a method for obtaining a minimal set of test configurations and their associated set oftest patterns that completely tests re-programmable Programmable Logic Arrays (P...
165
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VTS
2008
IEEE
16 years 1 months ago
2008
IEEE
Dealing with static and dynamic parameter variations has become a major challenge for design and test. To avoid unnecessary yield loss and to ensure reliable system operation a ro...
158
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GLVLSI
2007
IEEE
16 years 1 months ago
2007
IEEE
The path-delay fault simulation of functional tests on complex circuits such as current processor-based systems is a daunting task. The amount of computing power and memory needed...
177
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KBSE
2008
IEEE
16 years 1 months ago
2008
IEEE
Abstract—A poorly understood but important factor in random testing is the selection of a maximum length for test runs. Given a limited time for testing, it is seldom clear wheth...
155
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DATE
2006
IEEE
16 years 21 days ago
2006
IEEE
Today’s nanometer technology trends have a very negative impact on the reliability of semiconductor products. Intermittent faults constitute the largest part of reliability fail...