5855 search results - page 237 / 1171 » Test generation and minimization with |
202
click to vote
FCCM
2003
IEEE
15 years 12 months ago
2003
IEEE
Two FPGA based implementations of random number generators intended for embedded cryptographic applications are presented. The first is a true random number generator (TRNG) whic...
165
click to vote
DAC
1996
ACM
15 years 10 months ago
1996
ACM
The development of new Field-Programmed, MaskProgrammed and Laser-Programmed Gate Array architectures is hampered by the lack of realistic test circuits that exercise both the arc...
138
click to vote
TEC
2011
15 years 1 months ago
2011
—Trial vector generation strategies and control parameters have a significant influence on the performance of differential evolution (DE). This paper studies whether the performa...
158
click to vote
PVLDB
2010
15 years 5 months ago
2010
To evaluate the performance of database applications and DBMSs, we usually execute workloads of queries on generated databases of different sizes and measure the response time. Th...
154
click to vote
ISAAC
2007
Springer
16 years 23 days ago
2007
Springer
This paper shows that it is NP-hard to generate a minimum complete test set for stuck-at faults on the wires of a reversible circuit. We also show non-trivial lower bounds for the ...