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ITC
1998
IEEE
61views Hardware» more  ITC 1998»
15 years 10 months ago
Test session oriented built-in self-testable data path synthesis
Existing high-level BIST synthesis methods focus on one objective, minimizing either area overhead or test time. Hence, those methods do not render exploration of large design spa...
Han Bin Kim, Takeshi Takahashi, Dong Sam Ha
DAC
1996
ACM
15 years 10 months ago
Test Point Insertion: Scan Paths through Combinational Logic
We propose a low-overhead scan design methodology which employs a new test point insertion technique to establish scan paths through the functional logic. The technique re-uses th...
Chih-Chang Lin, Malgorzata Marek-Sadowska, Kwang-T...
ET
2006
72views more  ET 2006»
15 years 6 months ago
Optimization of Test/Diagnosis/Rework Location(s) and Characteristics in Electronic System Assembly
In this paper, an optimization methodology is used to select the locations and characteristics of test, diagnosis and rework operations in electronic systems assembly processes. Re...
Zhen Shi, Peter Sandborn
ACSAC
2003
IEEE
15 years 12 months ago
Synthesizing Test Data for Fraud Detection Systems
This paper reports an experiment aimed at generating synthetic test data for fraud detection in an IP based videoon-demand service. The data generation verifies a methodology pre...
Emilie Lundin Barse, Håkan Kvarnström, ...
TSP
2010
15 years 1 months ago
Learning graphical models for hypothesis testing and classification
Sparse graphical models have proven to be a flexible class of multivariate probability models for approximating high-dimensional distributions. In this paper, we propose techniques...
Vincent Y. F. Tan, Sujay Sanghavi, John W. Fisher ...