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LCTRTS
2010
Springer
16 years 1 months ago
Analysis and approximation for bank selection instruction minimization on partitioned memory architecture
A large number of embedded systems include 8-bit microcontrollers for their energy efficiency and low cost. Multi-bank memory architecture is commonly applied in 8-bit microcontr...
Minming Li, Chun Jason Xue, Tiantian Liu, Yingchao...
DAC
2010
ACM
15 years 10 months ago
Off-chip memory bandwidth minimization through cache partitioning for multi-core platforms
We present a methodology for off-chip memory bandwidth minimization through application-driven L2 cache partitioning in multicore systems. A major challenge with multi-core system...
Chenjie Yu, Peter Petrov
MPC
2004
Springer
115views Mathematics» more  MPC 2004»
15 years 12 months ago
A Free Construction of Kleene Algebras with Tests
In this paper we define Kleene algebra with tests in a slightly more general way than Kozen’s definition. Then we give an explicit construction of the free Kleene algebra with...
Hitoshi Furusawa
EURODAC
1990
IEEE
102views VHDL» more  EURODAC 1990»
15 years 10 months ago
Tools and devices supporting the pseudo-exhaustive test
: In this paper logical cells and algorithms are presented supporting the design of pseudo-exhaustively testable circuits. The approach is based on real hardware segmentation, inst...
Sybille Hellebrand, Hans-Joachim Wunderlich
ICPP
2007
IEEE
16 years 26 days ago
Analyzing and Minimizing the Impact of Opportunity Cost in QoS-aware Job Scheduling
Quality of service (QoS) mechanisms allowing users to request for turn-around time guarantees for their jobs have recently generated much interest. In our previous work we had des...
Mohammad Islam, Pavan Balaji, Gerald Sabin, P. Sad...