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TVLSI
2002
98views more  TVLSI 2002»
15 years 6 months ago
Minimizing memory access energy in embedded systems by selective instruction compression
We propose a technique for reducing the energy spent in the memory-processor interface of an embedded system during the execution of firmware code. The method is based on the idea ...
Luca Benini, Alberto Macii, Enrico Macii, Massimo ...
EMNLP
2009
15 years 4 months ago
A Simple Unsupervised Learner for POS Disambiguation Rules Given Only a Minimal Lexicon
We propose a new model for unsupervised POS tagging based on linguistic distinctions between open and closed-class items. Exploiting notions from current linguistic theory, the sy...
Qiuye Zhao, Mitch Marcus
FPL
2009
Springer
161views Hardware» more  FPL 2009»
15 years 11 months ago
A multi-FPGA architecture for stochastic Restricted Boltzmann Machines
Although there are many neural network FPGA architectures, there is no framework for designing large, high-performance neural networks suitable for the real world. In this paper, ...
Daniel L. Ly, Paul Chow
SIGSOFT
2010
ACM
15 years 4 months ago
Directed test suite augmentation: techniques and tradeoffs
Test suite augmentation techniques are used in regression testing to identify code elements affected by changes and to generate test cases to cover those elements. Our preliminary...
Zhihong Xu, Yunho Kim, Moonzoo Kim, Gregg Rotherme...
TVLSI
2008
140views more  TVLSI 2008»
15 years 6 months ago
A Novel Mutation-Based Validation Paradigm for High-Level Hardware Descriptions
We present a Mutation-based Validation Paradigm (MVP) technology that can handle complete high-level microprocessor implementations and is based on explicit design error modeling, ...
Jorge Campos, Hussain Al-Asaad