We present a set of reduction rules for LTL model-checking of 1-safe Petri nets. Our reduction techniques are of two kinds: (1) Linear programming techniques which are based on wel...
The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...
p2b is a research tool that translates Promela programs to boolean representations of the automata associated with them. These representations conform to the input syntax of the wi...
Certain manufacturing steps in very deep submicron VLSI involve chemical-mechanical polishing CMP which has varying e ects on device and interconnect features, depending on loca...
Andrew B. Kahng, Gabriel Robins, Anish Singh, Alex...
In this paper, we present a new method to the built-in selftestable data path synthesis based on integer linear programming (ILP). Our method performs system register assignment, ...