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CODES
2007
IEEE
16 years 1 months ago
Performance improvement of block based NAND flash translation layer
With growing capacities of flash memories, an efficient layer to manage read and write access to flash is required. NFTL is a widely used block based flash translation layer de...
Siddharth Choudhuri, Tony Givargis
CODES
2006
IEEE
16 years 22 days ago
Layout aware design of mesh based NoC architectures
Design of System-on-Chip (SoC) with regular mesh based Network-on-Chip (NoC) consists of mapping processing cores to routers, and routing of the traffic traces on the topology suc...
Krishnan Srinivasan, Karam S. Chatha
ESEC
1997
Springer
15 years 10 months ago
Verification of Liveness Properties Using Compositional Reachability Analysis
The software architecture of a distributed program can be represented by a hierarchical composition of subsystems, with interacting processes at the leaves of the hierarchy. Compo...
Shing-Chi Cheung, Dimitra Giannakopoulou, Jeff Kra...
DAC
2004
ACM
15 years 10 months ago
Probabilistic regression suites for functional verification
Random test generators are often used to create regression suites on-the-fly. Regression suites are commonly generated by choosing several specifications and generating a number o...
Shai Fine, Shmuel Ur, Avi Ziv
218
Voted
ATAL
2010
Springer
15 years 7 months ago
Distributed BDD-based BMC for the verification of multi-agent systems
We present a method of distributed model checking of multiagent systems specified by a branching-time temporal-epistemic logic. We introduce a serial algorithm, central to the dis...
Andrew V. Jones, Alessio Lomuscio