This paper introduces an accurate and efficient electrical analysis of logic gates modeled as Multiple Voltage Threshold Models (MVTM) loaded by the associated interconnect. MVTMs...
Peter Feldmann, Soroush Abbaspour, Debjit Sinha, G...
A SystemC simulation kernel consists of a deterministic implementation of the scheduler, whose specification is nondeterministic. To leverage testing of a SystemC TLM design, we f...
Since process and environmental variations can no longer be ignored in high-performance microprocessor designs, it is necessary to develop techniques for computing the sensitiviti...
Sanjay V. Kumar, Chandramouli V. Kashyap, Sachin S...
The effect of crosstalk errors is most significant in highperformance circuits, mandating at-speed testing for crosstalk defects. This paper describes a self-test methodology that...
Increasingly significant variational effects present a great challenge for delivering desired clock skew reliably. Non-tree clock network has been recognized as a promising approac...