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ICCAD
2003
IEEE
127views Hardware» more  ICCAD 2003»
16 years 3 months ago
A Probabilistic-Based Design Methodology for Nanoscale Computation
As current silicon-based techniques fast approach their practical limits, the investigation of nanoscale electronics, devices and system architectures becomes a central research p...
R. Iris Bahar, Joseph L. Mundy, Jie Chen
ICCAD
2003
IEEE
123views Hardware» more  ICCAD 2003»
16 years 3 months ago
The Y-Architecture for On-Chip Interconnect: Analysis and Methodology
The Y-architecture for on-chip interconnect is based on pervasive use of 0-, 120-, and 240-degree oriented semi-global and global wiring. Its use of three uniform directions explo...
Hongyu Chen, Chung-Kuan Cheng, Andrew B. Kahng, Io...
ICCAD
2003
IEEE
152views Hardware» more  ICCAD 2003»
16 years 3 months ago
Fredkin/Toffoli Templates for Reversible Logic Synthesis
Reversible logic has applications in quantum computing, low power CMOS, nanotechnology, optical computing, and DNA computing. The most common reversible gates are the Toffoli gate...
Dmitri Maslov, Gerhard W. Dueck, D. Michael Miller
BSN
2009
IEEE
160views Sensor Networks» more  BSN 2009»
16 years 1 months ago
BSN Simulator: Optimizing Application Using System Level Simulation
—A biomonitoring application running on wireless BAN has stringent timing and energy requirements. Developing such applications therefore presents unique challenges in both hardw...
Ioana Cutcutache, Thi Thanh Nga Dang, Wai Kay Leon...
DATE
2009
IEEE
154views Hardware» more  DATE 2009»
16 years 1 months ago
Reliability aware through silicon via planning for 3D stacked ICs
Abstract—This work proposes reliability aware through silicon via (TSV) planning for the 3D stacked silicon integrated circuits (ICs). The 3D power distribution network is modele...
Amirali Shayan Arani, Xiang Hu, He Peng, Chung-Kua...