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ICCAD
2004
IEEE
83views Hardware» more  ICCAD 2004»
16 years 3 months ago
Custom-optimized multiplierless implementations of DSP algorithms
Linear DSP kernels such as transforms and filters are comprised exclusively of additions and multiplications by constants. These multiplications may be realized as networks of ad...
Markus Püschel, Adam C. Zelinski, James C. Ho...
ICCAD
2003
IEEE
166views Hardware» more  ICCAD 2003»
16 years 3 months ago
Fault-Tolerant Techniques for Ambient Intelligent Distributed Systems
Ambient Intelligent Systems provide an unexplored hardware platform for executing distributed applications under strict energy constraints. These systems must respond quickly to c...
Diana Marculescu, Nicholas H. Zamora, Phillip Stan...
FPL
2007
Springer
106views Hardware» more  FPL 2007»
16 years 1 months ago
RAMP Blue: A Message-Passing Manycore System in FPGAs
We are developing a set of reusable design blocks and several prototype systems for emulation of multi-core architectures in FPGAs. RAMP Blue is the first of these prototypes and...
Alex Krasnov, Andrew Schultz, John Wawrzynek, Greg...
ICPPW
2006
IEEE
16 years 1 months ago
Retargeting Image-Processing Algorithms to Varying Processor Grain Sizes
Embedded computing architectures can be designed to meet a variety of application specific requirements. However, optimized hardware can require compiler support to realize the po...
Sam Sander, Linda M. Wills
MICRO
2006
IEEE
102views Hardware» more  MICRO 2006»
16 years 29 days ago
Managing Distributed, Shared L2 Caches through OS-Level Page Allocation
This paper presents and studies a distributed L2 cache management approach through OS-level page allocation for future many-core processors. L2 cache management is a crucial multi...
Sangyeun Cho, Lei Jin