3340 search results - page 394 / 668 » Teaching networking hardware |
191
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ICCAD
1996
IEEE
15 years 11 months ago
1996
IEEE
In this paper we present an ecient technique to reduce the switching activity in a CMOS combinational logic network based on local logic transformations. These transformations con...
187
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FPL
1997
Springer
15 years 11 months ago
1997
Springer
Technology mapping can be viewed as the optimization problem of finding a minimum cost cover of the given Boolean network by choosing from given library of logic cells. The core of...
156
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HPDC
1993
IEEE
15 years 11 months ago
1993
IEEE
Building the hardware for a high-performance distributed computer system is a lot easier than building its software. In this paper we describe a model for programtributed systems ...
155
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ICCD
1994
IEEE
15 years 11 months ago
1994
IEEE
Systems for multi-level logic optimization are usually based on a set of specialized, loosely-related transformations which work on a network representation. The sequence of trans...
200
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ISCA
1993
IEEE
15 years 11 months ago
1993
IEEE
Parallel programs that use critical sections and are executed on a shared-memory multiprocessor with a writeinvalidate protocol result in invalidation actions that could be elimin...