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ISCA
1998
IEEE
114views Hardware» more  ISCA 1998»
15 years 11 months ago
The MIT Alewife Machine: Architecture and Performance
Alewife is a multiprocessor architecture that supports up to 512 processing nodes connected over a scalable and cost-effective mesh network at a constant cost per node. The MIT Al...
Anant Agarwal, Ricardo Bianchini, David Chaiken, K...
ICCAD
1997
IEEE
105views Hardware» more  ICCAD 1997»
15 years 11 months ago
Fast field solver-programs for thermal and electrostatic analysis of microsystem elements
To solve the problem of fast thermal and electrostatic simulation of microsystem elements two different field solver tools have been developed at TUB. The µSTHERMANAL program is ...
Vladimir Székely, Márta Rencz
ISSS
1997
IEEE
103views Hardware» more  ISSS 1997»
15 years 11 months ago
Fast and Extensive System-Level Memory Exploration for ATM Applications
In this paper, our memory architecture exploration methodology and CAD techniques for network protocol applications are presented. Prototype tools have been implemented, and appli...
Peter Slock, Sven Wuytack, Francky Catthoor, Gjalt...
ICCAD
1996
IEEE
86views Hardware» more  ICCAD 1996»
15 years 11 months ago
Polarized observability don't cares
A new method is presented to compute the exact observability don't cares (ODC) for multilevel combinational circuits. A new mathematical concept, called polarization, is intr...
Harm Arts, Michel R. C. M. Berkelaar, C. A. J. van...
ICCAD
1996
IEEE
119views Hardware» more  ICCAD 1996»
15 years 11 months ago
An algorithm for synthesis of system-level interface circuits
We describe an algorithm for the synthesis and optimization of interface circuits for embedded system components such as microprocessors, memory ASIC, and network subsystems with ...
Ki-Seok Chung, Rajesh K. Gupta, C. L. Liu