3340 search results - page 390 / 668 » Teaching networking hardware |
160
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ISCAS
2002
IEEE
15 years 11 months ago
2002
IEEE
The paper discusses State Space Blind Source Recovery (BSR) for minimum phase and non-minimum phase mixtures of gaussian and non-gaussian distributions. The State Space Natural Gr...
175
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ISQED
2002
IEEE
15 years 11 months ago
2002
IEEE
This paper presents a methodology for the statistical analysis of clock tree structures. It allows to accurately predict and analyze the impact of process variation on clock skew....
167
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ISSS
2002
IEEE
15 years 11 months ago
2002
IEEE
In this paper, we present a new methodology for application specific multiprocessor system-on-chip design. This approach facilitates the integration of existing components with th...
174
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FPL
2009
Springer
15 years 11 months ago
2009
Springer
Clock gating is a power reduction technique that has been used successfully in the custom ASIC domain. Clock and logic signal power are saved by temporarily disabling the clock si...
159
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FPL
2001
Springer
15 years 11 months ago
2001
Springer
Although SRAM programmed Field Programmable Gate Arrays (FPGA's) have come to dominate the industry due to their density and performance advantages over non-volatile technolog...