3340 search results - page 387 / 668 » Teaching networking hardware |
155
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DATE
2003
IEEE
16 years 4 days ago
2003
IEEE
A primary goal of high-level modeling is to efficiently explore a broad design space, converging on an optimal or near-optimal system architecture before moving to a more detaile...
150
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DATE
2003
IEEE
2003
IEEE
Exploiting the Routing Flexibility for Energy/Performance Aware Mapping of Regular NoC Architectures
16 years 4 days ago
In this paper, we present an algorithm which automatically maps the IPs onto a generic regular Network on Chip (NoC) architecture and constructs a deadlock-free deterministic rout...
158
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DATE
2003
IEEE
16 years 4 days ago
2003
IEEE
This paper describes a design methodology for the estimation of bus performance of a tuplespace for factory automation. The need of a tuplespace is motivated by the characteristic...
167
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DATE
2003
IEEE
16 years 4 days ago
2003
IEEE
Software implementations of channel decoding algorithms are attractive for communication systems with their large variety of existing and emerging standards due to their flexibil...
183
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DATE
2003
IEEE
16 years 4 days ago
2003
IEEE
Novel reconfigurable computing architectures exploit the inherent parallelism available in many signalprocessing problems. These architectures often consist of networks of compute...