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164
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ARC
2010
Springer
15 years 10 months ago
2010
Springer
As reconfigurable computing hardware and in particular FPGA-based systems-on-chip comprise an increasing number of processor and accelerator cores, supporting sharing and synchroni...
143
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IPPS
2006
IEEE
16 years 23 days ago
2006
IEEE
Zero-copy, RDMA, and protocol offload are three very important characteristics of high performance interconnects. Previous networks that made use of these techniques were built u...
193
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ISCAS
2006
IEEE
16 years 23 days ago
2006
IEEE
—In this paper, we present an overview of the JPWL standardization activity. JPWL is an extension of JPEG 2000 for the efficient transmission of JPEG 2000 images over an error-pr...
169
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ISCAS
2006
IEEE
16 years 23 days ago
2006
IEEE
— This paper describes a new architecture for a cellular processor array integrated circuit, which operates in both discreteand continuous-time domains. Asynchronous propagation ...
147
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ISMVL
2006
IEEE
16 years 23 days ago
2006
IEEE
A multiple-valued input address generator produces a unique address given a multiple-valued input data vector. This paper presents methods to realize multiple-valued input address...