3340 search results - page 312 / 668 » Teaching networking hardware |
171
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ASPDAC
2009
ACM
16 years 1 months ago
2009
ACM
— Power distribution networks (PDNs) are designed and analyzed iteratively. Random walk is among the most efficient methods for PDN analysis. We develop in this paper an increme...
194
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ASPDAC
2009
ACM
16 years 1 months ago
2009
ACM
—Reversible logic studies have promising potential on energy lossless circuit design, quantum computation, nanotechnology, etc. Reversible logic features a one-to-one input outpu...
197
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ICCD
2008
IEEE
16 years 1 months ago
2008
IEEE
Abstract— Clock gating is a popular technique for reducing power dissipation in clock network. Although there have been numerous research efforts on clock gating, the previous ap...
163
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DATE
2010
IEEE
15 years 5 months ago
2010
IEEE
Abstract—On-chip interconnection network is a crucial design component in high-performance System-on-Chips (SoCs). Many of previous works have focused on the automation of its to...
198
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ISCAS
2011
IEEE
14 years 10 months ago
2011
IEEE
— we present an implementation of a programmable axonal propagation delay circuit which uses one first-order logdomain low-pass filter. Delays may be programmed in the 550ms rang...