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ICCAD
2005
IEEE
95views Hardware» more  ICCAD 2005»
16 years 3 months ago
Application-specific network-on-chip architecture customization via long-range link insertion
Networks-on-Chip (NoCs) represent a promising solution to complex on-chip communication problems. The NoC communication architectures considered so far are based on either complete...
Ümit Y. Ogras, Radu Marculescu
ISCA
2009
IEEE
186views Hardware» more  ISCA 2009»
16 years 1 months ago
Application-aware deadlock-free oblivious routing
Conventional oblivious routing algorithms are either not application-aware or assume that each flow has its own private channel to ensure deadlock avoidance. We present a framewo...
Michel A. Kinsy, Myong Hyon Cho, Tina Wen, G. Edwa...
SBACPAD
2008
IEEE
249views Hardware» more  SBACPAD 2008»
16 years 1 months ago
Processing Neocognitron of Face Recognition on High Performance Environment Based on GPU with CUDA Architecture
This work presents an implementation of Neocognitron Neural Network, using a high performance computing architecture based on GPU (Graphics Processing Unit). Neocognitron is an ar...
Gustavo Poli, José Hiroki Saito, Joã...
IPPS
2007
IEEE
16 years 1 months ago
Peak-Performance DFA-based String Matching on the Cell Processor
The security of your data and of your network is in the hands of intrusion detection systems, virus scanners and spam filters, which are all critically based on string matching. ...
Daniele Paolo Scarpazza, Oreste Villa, Fabrizio Pe...
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SBACPAD
2007
IEEE
128views Hardware» more  SBACPAD 2007»
16 years 1 months ago
Node Level Primitives for Parallel Exact Inference
We present node level primitives for parallel exact inference on an arbitrary Bayesian network. We explore the probability representation on each node of Bayesian networks and eac...
Yinglong Xia, Viktor K. Prasanna