Sciweavers

3340 search results - page 273 / 668
» Teaching networking hardware
Sort
View
COMSUR
2011
228views Hardware» more  COMSUR 2011»
14 years 6 months ago
Energy Harvesting Sensor Nodes: Survey and Implications
Sensor networks with battery-powered nodes can seldom simultaneously meet the design goals of lifetime, cost, sensing reliability and sensing and transmission coverage. Energy-har...
Sujesha Sudevalayam, Purushottam Kulkarni
MOBISYS
2006
ACM
16 years 6 months ago
Feasibility study of mesh networks for all-wireless offices
There is a fair amount of evidence that mesh (static multihop wireless) networks are gaining popularity, both in the academic literature and in the commercial space. Nonetheless, ...
Jakob Eriksson, Sharad Agarwal, Paramvir Bahl, Jit...
MICRO
2009
IEEE
99views Hardware» more  MICRO 2009»
16 years 1 months ago
Low-cost router microarchitecture for on-chip networks
On-chip networks are critical to the scaling of future multicore processors. The challenge for on-chip network is to reduce the cost including power consumption and area while pro...
John Kim
MICRO
2002
IEEE
171views Hardware» more  MICRO 2002»
15 years 11 months ago
Orion: a power-performance simulator for interconnection networks
With the prevalence of server blades and systems-ona-chip (SoCs), interconnection networks are becoming an important part of the microprocessor landscape. However, there is limite...
Hangsheng Wang, Xinping Zhu, Li-Shiuan Peh, Sharad...
ICCAD
2000
IEEE
109views Hardware» more  ICCAD 2000»
15 years 11 months ago
Latency-Guided On-Chip Bus Network Design
Abstract— Deep submicron technology scaling has two major ramifications on the design process. First, reduced feature size significantly increases wire delay, thus resulting in...
Milenko Drinic, Darko Kirovski, Seapahn Meguerdich...