3340 search results - page 267 / 668 » Teaching networking hardware |
172
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3DIC
2009
IEEE
16 years 1 months ago
2009
IEEE
—The physical performance of a 3-Dimensional Network-on-Chip (NoC) mesh architecture employing Through Silicon Vias (TSV) for vertical connectivity is investigated with a cycle-a...
164
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
Nowadays, in MPSoCs and NoCs, multicast protocol is significantly used for many parallel applications such as cache coherency in distributed shared-memory architectures, clock sync...
162
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DATE
2008
IEEE
16 years 1 months ago
2008
IEEE
—Latch based circuits are widely adopted in high performance circuits. But there is a lack of accurate latch models for doing timing analysis. In this paper, we propose a new lat...
190
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IWNAS
2008
IEEE
16 years 1 months ago
2008
IEEE
To protect data and recover data in case of failures, Linux operating system has built-in MD device that implements RAID architectures. Such device can recover data in case of sin...
191
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ETS
2007
IEEE
16 years 1 months ago
2007
IEEE
The paper proposes a new concept of diagnosing faulty links in Network-on-a-Chip (NoC) designs. The method is based on functional fault models and it implements packet address dri...