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DATE
2006
IEEE
173views Hardware» more  DATE 2006»
16 years 21 days ago
3dID: a low-power, low-cost hand motion capture device
This paper presents a novel input device design for capturing gestures. The system is based on commodity components and combines accelerometers, gyroscopes and bend sensors. It is...
Michele Sama, Vincenzo Pacella, Elisabetta Farella...
ISQED
2005
IEEE
162views Hardware» more  ISQED 2005»
16 years 7 days ago
Controlled-Load Limited Switch Dynamic Logic Circuit
Limited Switch Dynamic Logic (LSDL), a high performance logic circuit, has been modified by introducing a pseudo-nMOS style load. The resultant circuit consumes less power, primar...
Jayakumaran Sivagnaname, Hung C. Ngo, Kevin J. Now...
ICANN
2005
Springer
16 years 5 days ago
Balancing Guidance Range and Strength Optimizes Self-organization by Silicon Growth Cones
Abstract. We characterize the first hardware implementation of a selforganizing map algorithm based on axon migration. A population of silicon growth cones automatically wires a t...
Brian Taba, Kwabena Boahen
FPL
2004
Springer
141views Hardware» more  FPL 2004»
16 years 1 days ago
Automatic Synthesis of Efficient Intrusion Detection Systems on FPGAs
—This paper presents a methodology and a tool for automatic synthesis of highly efficient intrusion detection systems using a high-level, graph-based partitioning methodology and...
Zachary K. Baker, Viktor K. Prasanna
ITC
2003
IEEE
162views Hardware» more  ITC 2003»
15 years 12 months ago
FPGA Interconnect Delay Fault Testing
The interconnection network consumes the majority of die area in an FPGA. Presented is a scalable manufacturing test method for all SRAM-based FPGAs, able to detect multiple inter...
Erik Chmelar