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FPGA
2001
ACM
162views FPGA» more  FPGA 2001»
15 years 11 months ago
Reprogrammable network packet processing on the field programmable port extender (FPX)
A prototype platform has been developed that allows processing of packets at the edge of a multi-gigabit-per-second network switch. This system, the Field Programmable Port Extend...
John W. Lockwood, Naji Naufel, Jonathan S. Turner,...
MICRO
2010
IEEE
130views Hardware» more  MICRO 2010»
15 years 4 months ago
Pseudo-Circuit: Accelerating Communication for On-Chip Interconnection Networks
As the number of cores on a single chip increases with more recent technologies, a packet-switched on-chip interconnection network has become a de facto communication paradigm for ...
Minseon Ahn, Eun Jung Kim
SIGMETRICS
2012
ACM
257views Hardware» more  SIGMETRICS 2012»
13 years 9 months ago
Fair sampling across network flow measurements
Sampling is crucial for controlling resource consumption by internet traffic flow measurements. Routers use Packet Sampled NetFlow [9], and completed flow records are sampled in...
Nick G. Duffield
REST
2010
ACM
15 years 11 months ago
A RESTful messaging system for asynchronous distributed processing
Traditionally, distributed computing problems have been solved by partitioning data into chunks able to be handled by commodity hardware. Such partitioning is not possible in case...
Ian Jacobi, Alexey Radul
HPCA
2009
IEEE
16 years 1 months ago
MRR: Enabling fully adaptive multicast routing for CMP interconnection networks
On-network hardware support for multi-destination traffic is a desirable feature in most multiprocessor machines. Multicast hardware capabilities enable much more effective bandwi...
Pablo Abad Fidalgo, Valentin Puente, José-&...