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172
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CCGRID
2006
IEEE
16 years 21 days ago
2006
IEEE
This paper describes the integration of the High Level Architecture (HLA), an IEEE standard for distributed interactive simulation, with a scientific software package (Scilab) and...
156
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DATE
2006
IEEE
16 years 21 days ago
2006
IEEE
This paper presents the Block Processing Engine (BPE), an Application Specific Instruction-Set Processor (ASIP) explicitly designed for the implementation of multistandard wireles...
173
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EUROMICRO
2006
IEEE
16 years 21 days ago
2006
IEEE
In this paper we examine the capabilities of Switched Ethernet for building wireless mesh networks (WMNs) and more specific for the support of fast moving users. We will motivate...
176
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EUROMICRO
2006
IEEE
16 years 21 days ago
2006
IEEE
This paper describes an experience with a Software Process Improvement (SPI) approach particularly adapted to small structures with low software maturity level (e.g. small and med...
159
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GLVLSI
2006
IEEE
16 years 21 days ago
2006
IEEE
Most of the logic synthesis algorithms are not scalable for large networks and, for this reason, partitioning is often applied. However traditional mincut-based partitioning techn...