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IV
2005
IEEE
149views Visualization» more  IV 2005»
16 years 8 hour ago
Visualisation Techniques for Users and Designers of Layout Algorithms
Visualisation systems consisting of a set of components through which data and interaction commands flow have been explored by a number of researchers. Such hybrid and multistage ...
Greg Ross, Alistair Morrison, Matthew Chalmers
CONCURRENCY
2010
95views more  CONCURRENCY 2010»
15 years 4 months ago
The Scalasca performance toolset architecture
SCALASCA is a performance toolset that has been specifically designed to analyze parallel application execution behavior on large-scale systems. It offers an incremental performan...
Markus Geimer, Felix Wolf, Brian J. N. Wylie, Erik...
ICCAD
2005
IEEE
100views Hardware» more  ICCAD 2005»
16 years 3 months ago
Performance-centering optimization for system-level analog design exploration
In this paper we propose a novel analog design optimization methodology to address two key aspects of top-down system-level design: (1) how to optimally compare and select analog ...
Xin Li, Jian Wang, Lawrence T. Pileggi, Tun-Shih C...
OSDI
2000
ACM
15 years 7 months ago
Trading Capacity for Performance in a Disk Array
A variety of performance-enhancing techniques, such as striping, mirroring, and rotational data replication, exist in the disk array literature. Given a fixed budget of disks, one...
Xiang Yu, Benjamin Gum, Yuqun Chen, Randolph Y. Wa...
DAC
2010
ACM
15 years 6 months ago
RAMP gold: an FPGA-based architecture simulator for multiprocessors
We present RAMP Gold, an economical FPGA-based architecture simulator that allows rapid early design-space exploration of manycore systems. The RAMP Gold prototype is a high-throu...
Zhangxi Tan, Andrew Waterman, Rimas Avizienis, Yun...