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VALUETOOLS
2006
ACM
167views Hardware» more  VALUETOOLS 2006»
16 years 16 days ago
Detailed cache simulation for detecting bottleneck, miss reason and optimization potentialities
Cache locality optimization is an efficient way for reducing the idle time of modern processors in waiting for needed data. This kind of optimization can be achieved either on the...
Jie Tao, Wolfgang Karl
CODES
2005
IEEE
16 years 6 days ago
DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs
We present a new scheme for dynamic voltage and frequency scaling (DVS) for processing multimedia streams on architectures with restricted buffer sizes. The main advantage of our ...
Alexander Maxiaguine, Samarjit Chakraborty, Lothar...
ICPP
2005
IEEE
16 years 5 days ago
Service Migration in Distributed Virtual Machines for Adaptive Grid Computing
Computational grids can integrate geographically distributed resources into a seamless environment. To facilitate managing these heterogenous resources, the virtual machine gy pro...
Song Fu, Cheng-Zhong Xu
RSP
2005
IEEE
164views Control Systems» more  RSP 2005»
16 years 5 days ago
High Level Synthesis for Data-Driven Applications
Abstract— John von Neumann proposed his famous architecture in a context where hardware was very expensive and bulky. His goal was to maximize functionality with minimal hardware...
Etienne Bergeron, Xavier Saint-Mleux, Marc Feeley,...
HT
2005
ACM
16 years 4 days ago
Processing link structures and linkbases in the web's open world linking
Hyperlinks are an essential feature of the World Wide Web, highly responsible for its success. XLink improves on HTML’s linking capabilities in several ways. In particular, link...
François Bry, Michael Eckert
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