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IWMM
2011
Springer
270views Hardware» more  IWMM 2011»
14 years 9 months ago
Memory management in NUMA multicore systems: trapped between cache contention and interconnect overhead
Multiprocessors based on processors with multiple cores usually include a non-uniform memory architecture (NUMA); even current 2-processor systems with 8 cores exhibit non-uniform...
Zoltan Majo, Thomas R. Gross
ITIIS
2008
151views more  ITIIS 2008»
15 years 6 months ago
Bandwidth Management of WiMAX Systems and Performance Modeling
WiMAX has been introduced as a competitive alternative for metropolitan broadband wireless access technologies. It is connection oriented and it can provide very high data rates, ...
Yue Li, Jianhua He, Weixi Xing
PPOPP
2006
ACM
16 years 20 days ago
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
Bratin Saha, Ali-Reza Adl-Tabatabai, Richard L. Hu...
WETICE
2000
IEEE
15 years 11 months ago
Workspace Awareness in Mobile Virtual Teams
Staying aware of each other in cooperative team work is something we take for granted in the everyday world, even if collaboration is not continuously face-to-face, and team membe...
Alois Ferscha
WISES
2003
15 years 8 months ago
A Simulation Architecture for Time-Triggered Transducer Networks
— Steadily growing microcontroller capabilities at an ever decreasing cost per operation encourage the development of more extensive and smarter applications in the domain of emb...
Martin Schlager