169 search results - page 17 / 34 » System level memory optimization for hardware-software co-de... |
180
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APCSAC
2004
IEEE
15 years 9 months ago
2004
IEEE
Dynamic optimization presents opportunities for finding run-time bottlenecks and deploying optimizations in statically compiled programs. In this paper, we discuss our current impl...
167
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CCGRID
2009
IEEE
16 years 19 days ago
2009
IEEE
In a cluster of multiple processors or cpu-cores, many processes may run on each compute node. Each process tends to issue contiguous I/O requests for snapshot, checkpointing or s...
165
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BCS
2008
15 years 7 months ago
2008
This paper describes our approaches to raise the level of abstraction at which hardware suitable for accelerating computationally-intensive applications can be specified. Field-Pr...
169
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CODES
2007
IEEE
16 years 6 days ago
2007
IEEE
3D stacked wafer integration has the potential to improve multiprocessor system-on-chip (MPSoC) integration density, performance, and power efficiency. However, the power density...
156
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CODES
2005
IEEE
15 years 11 months ago
2005
IEEE
For embedded system development, several companies provide cross-platform development tools to aid in debugging, prototyping and optimization of programs. These are full system em...