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» System level design, a VHDL based approach
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CCS
2011
ACM
14 years 6 months ago
MIDeA: a multi-parallel intrusion detection architecture
Network intrusion detection systems are faced with the challenge of identifying diverse attacks, in extremely high speed networks. For this reason, they must operate at multi-Giga...
Giorgos Vasiliadis, Michalis Polychronakis, Sotiri...
VSTTE
2005
Springer
16 years 5 days ago
Model Checking: Back and Forth between Hardware and Software
The interplay back and forth between software model checking and hardware model checking has been fruitful for both. Originally intended for the analysis of concurrent software, mo...
Edmund M. Clarke, Anubhav Gupta, Himanshu Jain, He...
SIGCOMM
2010
ACM
15 years 6 months ago
Crowdsourcing service-level network event monitoring
The user experience for networked applications is becoming a key benchmark for customers and network providers. Perceived user experience is largely determined by the frequency, d...
David R. Choffnes, Fabián E. Bustamante, Zi...
CAINE
2004
15 years 8 months ago
A PID Controller for Real-Time DC Motor Speed Control using the C505C Microcontroller
This paper presents a real-time DC Motor speed controller design using a microcontroller-based network system. The design architecture was developed using two Phytec evaluation bo...
Sukumar Kamalasadan, Abhiman Hande
CONEXT
2007
ACM
15 years 10 months ago
On the cost of caching locator/ID mappings
Very recent activities in the IETF and in the Routing Research Group (RRG) of the IRTG focus on defining a new Internet architecture, in order to solve scalability issues related ...
Luigi Iannone, Olivier Bonaventure