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» System level design, a VHDL based approach
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JSS
2006
65views more  JSS 2006»
15 years 6 months ago
Patterns of conflict among software components
Integrating a system of disparate components to form a single application is still a daunting, high risk task, especially for components with heterogeneous communication expectati...
Michelle Hepner, Rose F. Gamble, Manasi Kelkar, Le...
CCR
2004
151views more  CCR 2004»
15 years 6 months ago
Practical verification techniques for wide-area routing
Protocol and system designers use verification techniques to analyze a system's correctness properties. Network operators need verification techniques to ensure the "cor...
Nick Feamster
WSC
1998
15 years 8 months ago
Applying Temporal Databases to HLA Data Collection and Analysis
The High Level Architecture (HLA) for distributed simulations was proposed by the Defense Modeling and Simulation Office of the Department of Defense (DOD) in order to support int...
Thom McLean, Leo Mark, Margaret L. Loper, David Ro...
ISSTA
2004
ACM
16 years 4 days ago
An optimizing compiler for batches of temporal logic formulas
Model checking based on validating temporal logic formulas has proven practical and effective for numerous software engineering applications. As systems based on this approach ha...
James Ezick
CASES
2005
ACM
15 years 8 months ago
Architectural support for real-time task scheduling in SMT processors
In Simultaneous Multithreaded (SMT) architectures most hardware resources are shared between threads. This provides a good cost/performance trade-off which renders these architec...
Francisco J. Cazorla, Peter M. W. Knijnenburg, Riz...