5744 search results - page 371 / 1149 » System level design, a VHDL based approach |
212
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CODES
2006
IEEE
16 years 26 days ago
2006
IEEE
Predicting timing behavior is key to efficient embedded real-time system design and verification. Especially memory accesses and co-processor calls over shared communication net...
186
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DAC
2002
ACM
16 years 7 months ago
2002
ACM
We present an analytical method to evaluate embedded network packet processor architectures, and to explore their design space. Our approach is in contrast to those based on simul...
235
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SAC
2008
ACM
15 years 6 months ago
2008
ACM
In this paper, we adopt a template matching method to detect design patterns from a software system by calculating their normalized cross correlation. Because design patterns docu...
172
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DAC
2002
ACM
16 years 7 months ago
2002
ACM
This paper introduces an FPGA IP evaluation and delivery system that operates within Java applets. The use of such applets allows designers to create, evaluate, test, and obtain F...
160
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SIGMETRICS
2004
ACM
16 years 6 days ago
2004
ACM
Low priority data transfer across the wide area is useful in several contexts, for example for the dissemination of large files such as OS updates, content distribution or prefet...