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» System level design, a VHDL based approach
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SIES
2010
IEEE
15 years 4 months ago
Verification of a CAN bus model in SystemC with functional coverage
Abstract--Many heterogeneous embedded systems, for example industrial automation and automotive applications, require hard-real time constraints to be exhaustively verified - which...
Christoph Kuznik, Gilles B. Defo, Wolfgang Mü...
WWW
2005
ACM
16 years 20 hour ago
Improved timing control for web server systems using internal state information
How to effectively allocate system resource to meet the Service Level Agreement (SLA) of Web servers is a challenging problem. In this paper, we propose an improved scheme for aut...
Xue Liu, Rong Zheng, Jin Heo, Lui Sha
UM
2007
Springer
16 years 17 days ago
Preference-Based Organization Interfaces: Aiding User Critiques in Recommender Systems
Users’ critiques to the current recommendation form a crucial feedback mechanism for refining their preference models and improving a system’s accuracy in recommendations that ...
Li Chen, Pearl Pu
ICPR
2000
IEEE
15 years 11 months ago
Design of Effective Multiple Classifier Systems by Clustering of Classifiers
In the field of pattern recognition, multiple classifier systems based on the combination of outputs of a set of different classifiers have been proposed as a method for the devel...
Giorgio Giacinto, Fabio Roli, Giorgio Fumera
AOSE
2000
Springer
15 years 10 months ago
Designing Agent-Oriented Systems by Analysing Agent Interactions
We propose a preliminary methodology for agent-oriented software engineering based on the idea of agent interaction analysis. This approach uses interactions between undetermined a...
Simon Miles, Mike Joy, Michael Luck