5744 search results - page 1094 / 1149 » System level design, a VHDL based approach |
180
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TVLSI
2010
15 years 1 months ago
2010
Abstract--Higher circuit densities in system-on-chip (SOC) designs have led to drastic increase in test data volume. Larger test data size demands not only higher memory requiremen...
175
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TWC
2010
15 years 1 months ago
2010
In this paper 3-D Extrinsic Information Transfer (EXIT) charts are used to design binary Self-Concatenated Convolutional Codes employing Iterative Decoding (SECCC-ID), exchanging e...
222
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FORTE
2011
14 years 9 months ago
2011
Analyzing Border Gateway Protocol (BGP) instances is a crucial step in the design and implementation of safe BGP systems. Today, the analysis is a manual and tedious process. Resea...
185
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ICIP
2004
IEEE
16 years 8 months ago
2004
IEEE
In this paper we discuss an algorithm that is able to provide a scalable (multiresolution) representation of the motion field information. It has been recently demonstrated that, ...
145
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ICCAD
2008
IEEE
16 years 3 months ago
2008
IEEE
—The microprocessor verification challenge becomes higher in the on-chip bus (OCB) than in the unit-level. Especially for the external interrupts, since they interface with othe...