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» System level design, a VHDL based approach
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SIGGRAPH
1992
ACM
15 years 10 months ago
Interactive inspection of solids: cross-sections and interferences
To reduce the cost of correcting design errors, assemblies of mechanical parts are modeled using CAD systems and verified electronically before the designs are sent to manufacturi...
Jarek Rossignac, Abe Megahed, Bengt-Olaf Schneider
COMSWARE
2007
IEEE
15 years 10 months ago
On Configuring BGP Route Reflectors
The Border Gateway Protocol (BGP) is the standard protocol for exchanging routing information between border routers of Autonomous Systems (ASes) in today's Internet. Within a...
Yuri Breitbart, Minos N. Garofalakis, Anupam Gupta...
SIGCOMM
2009
ACM
16 years 1 months ago
GrassRoots: socially-driven web sites for the masses
Large, socially-driven Web 2.0 sites such as Facebook and Youtube have seen significant growth in popularity [5, 10]. However, strong demand also exists for socially-driven web s...
Frank Uyeda, Diwaker Gupta, Amin Vahdat, George Va...
FPGA
2007
ACM
122views FPGA» more  FPGA 2007»
16 years 20 days ago
The shunt: an FPGA-based accelerator for network intrusion prevention
Today’s network intrusion prevention systems (IPSs) must perform increasingly sophisticated analysis—parsing protocols and interpreting application dialogs rather than simply ...
Nicholas Weaver, Vern Paxson, José M. Gonz&...
CODES
2004
IEEE
15 years 10 months ago
Power analysis of system-level on-chip communication architectures
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
Kanishka Lahiri, Anand Raghunathan
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