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ASPDAC
2006
ACM
109views Hardware» more  ASPDAC 2006»
16 years 4 days ago
Cycle error correction in asynchronous clock modeling for cycle-based simulation
— As the complexity of SoCs is increasing, hardware/software co-verification becomes an important part of system verification. C-level cycle-based simulation could be an efficien...
Junghee Lee, Joonhwan Yi
IJCNN
2007
IEEE
16 years 14 days ago
System Identification for the Hodgkin-Huxley Model using Artificial Neural Networks
— A single biological neuron is able to perform complex computations that are highly nonlinear in nature, adaptive, and superior to the perceptron model. A neuron is essentially ...
Manish Saggar, Tekin Meriçli, Sari Andoni, ...
EURODAC
1995
IEEE
116views VHDL» more  EURODAC 1995»
15 years 9 months ago
An improved relaxation approach for mixed system analysis with several simulation tools
: This paper introduces a modified relaxation approach that allows to improve the convergence of iterations while analyzing mixed systems with different simulators. The method redu...
Vladimir B. Dmitriev-Zdorov, Bernhard Klaassen
DATE
2003
IEEE
112views Hardware» more  DATE 2003»
15 years 11 months ago
Transaction-Level Models for AMBA Bus Architecture Using SystemC 2.0
The concept of a SOC platform architecture introduces the concept of a communication infrastructure. In the transaction-level a finite set of architecture components (memories, ar...
Marco Caldari, Massimo Conti, Massimo Coppola, Ste...
ISCAS
2005
IEEE
191views Hardware» more  ISCAS 2005»
15 years 11 months ago
Behavioural modeling and simulation of a switched-current phase locked loop
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
Peter R. Wilson, Reuben Wilcock