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DAC
2010
ACM
15 years 5 months ago
SCEMIT: a systemc error and mutation injection tool
As high-level models in C and SystemC are increasingly used for verification and even design (through high-level synthesis) of electronic systems, there is a growing need for com...
Peter Lisherness, Kwang-Ting (Tim) Cheng
ISCAS
2008
IEEE
112views Hardware» more  ISCAS 2008»
16 years 27 days ago
Glitch-aware output switching activity from word-level statistics
— This paper presents models for estimating the transition activity of signals at the output of adders in Field Programmable Gate Arrays (FPGAs), given only word-level measures o...
Jonathan A. Clarke, George A. Constantinides, Pete...
DAC
1999
ACM
15 years 10 months ago
Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification
We present our practical experience in the modeling and integration of cycle/phase-accurate instruction set architecture (ISA) models of digital signal processors (DSPs) with othe...
Lisa M. Guerra, Joachim Fitzner, Dipankar Talukdar...
SIGGRAPH
1996
ACM
15 years 10 months ago
Modeling and Rendering Architecture from Photographs: A Hybrid Geometry- and Image-Based Approach
We present a new approach for modeling and rendering existing architectural scenes from a sparse set of still photographs. Our modeling approach, which combines both geometry-base...
Paul E. Debevec, Camillo J. Taylor, Jitendra Malik
EMSOFT
2008
Springer
15 years 8 months ago
Randomized directed testing (REDIRECT) for Simulink/Stateflow models
The Simulink/Stateflow (SL/SF) environment from Mathworks is becoming the de facto standard in industry for model based development of embedded control systems. Many commercial to...
Manoranjan Satpathy, Anand Yeolekar, S. Ramesh