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SPLC
2007
15 years 8 months ago
Automating Mappings between Use Case Diagrams and Feature Models for Software Product Lines
Features have been widely used by the product line community to model variability. They represent the common and variable characteristics of the members of a product line. They ar...
Alexandre Bragança, Ricardo Jorge Machado
176
Voted
ENTCS
2008
95views more  ENTCS 2008»
15 years 7 months ago
A Rule-based Method to Match Software Patterns Against UML Models
In a UML model, different aspects of a system are covered by different types of diagrams and this bears the risk that an overall system specification becomes barely tractable by t...
Demis Ballis, Andrea Baruzzo, Marco Comini
162
Voted
TCAD
2008
103views more  TCAD 2008»
15 years 6 months ago
Using Transfer-Resource Graph for Software-Based Verification of System-on-Chip
The verification of a system-on-chip is challenging due to its high level of integration. Multiple components in a system can behave concurrently and compete for resources. Hence, ...
Xiaoxi Xu, Cheng-Chew Lim
184
Voted
SERP
2003
15 years 8 months ago
Scenario-Based Software Architecture Modeling Using Message Sequence Charts
Modern approaches in software development propose the use of software architectures to help handle the complexity of large software system developments. An important technique to ...
Gerardo Padilla, Cuauhtémoc Lemus Olalde, M...
FMOODS
2007
15 years 8 months ago
KeY: A Formal Method for Object-Oriented Systems
Abstract. This paper gives an overview of the KeY approach and highlights the main features of the KeY system. KeY is an approach (and a system) for the deductive verification of ...
Wolfgang Ahrendt, Bernhard Beckert, Reiner Hä...