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HIPEAC
2007
Springer
16 years 1 months ago
Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches
Caches are designed to provide the best tradeoff between access speed and capacity for a set of target applications. Unfortunately, different applications, and even different phas...
Sonia López, Steve Dropsho, David H. Albone...
HIPEAC
2007
Springer
16 years 1 months ago
Compiler-Assisted Memory Encryption for Embedded Processors
A critical component in the design of secure processors is memory encryption which provides protection for the privacy of code and data stored in off-chip memory. The overhead of ...
Vijay Nagarajan, Rajiv Gupta, Arvind Krishnaswamy
HIPEAC
2007
Springer
16 years 1 months ago
Fetch Gating Control Through Speculative Instruction Window Weighting
In a dynamic reordering superscalar processor, the front-end fetches instructions and places them in the issue queue. Instructions are then issued by the back-end execution core. T...
Hans Vandierendonck, André Seznec
HIPEAC
2007
Springer
16 years 1 months ago
A Throughput-Driven Task Creation and Mapping for Network Processors
Abstract. Network processors are programmable devices that can process packets at a high speed. A network processor is typified by multithreading and heterogeneous multiprocessing...
Lixia Liu, Xiao-Feng Li, Michael K. Chen, Roy Dz-C...
HIPEAC
2005
Springer
16 years 28 days ago
Dynamic Evolution of Congestion Trees: Analysis and Impact on Switch Architecture
Abstract. Designers of large parallel computers and clusters are becoming increasingly concerned with the cost and power consumption of the interconnection network. A simple way to...
Pedro Javier García, Jose Flich, José...
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